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Jose-Maria Arnau

jarnau@ac.upc.edu

UPC - BarcelonaTech
C6-115 Campus Nord UPC
C\Jordi Girona 1-3
08034 Barcelona, Spain
Phone: +34 9340 54039

Find a brief CV of mine


Short Biography

I am a distinguished researcher at UPC BarcelonaTech. I work in the ARCO (ARchitectures and COmpilers) research group hosted in the Computer Architecture Department. I received BSc in Computer Engineering from the Universitat Jaume I, and MSc and Ph.D. on Computer Architecture from the UPC. My thesis was done under the supervision of Dr. Polychronis Xekalakis and Prof. Joan-Manuel Parcerisa.


Current Research

My research focuses on energy-efficient hardware architectures for cognitive computing. I work on novel techniques to improve the energy-efficiency of Domain Specific Accelerators for deep learning, considering both FPGA and ASIC solutions. My research also explores techniques to improve GPGPU architectures for graph-processing and machine learning workloads.


Publications

Peer-Reviewed Conferences:

Peer-Reviewed Journals:


Past Research

My past research focused on energy-efficient architectures for mobile GPUs:


Lectures