Processor Design

This course offers a more advanced treatment of digital design in the context of microprocessors. With a special emphasis on:


Course presentation: [pdf]

  1. Moore's Law & Dennard Scaling [pdf]
    1. Transistor basic physics
    2. Power wall
    3. Dark silicon
  2. Hardware Design Cycle [pdf] []
    1. System specification
    2. Architectural design
    3. Logic design
    4. Circuit design
    5. Physical Design
  3. Functional Verification [pdf] []
    1. Directed testing
    2. Constrained Random Verification
    3. Functional Coverage
  4. Circuit Design [pdf] []
    1. RTL synthesis
    2. Gate-level netlist optimization
    3. Delay and area estimation
  5. Physical Design [Slides VLSI Physical Design book]
    1. Partitioning
    2. Chip planning
    3. Placement & Routing
    4. Timing closure
  6. Field Programmable Gate Arrays [pdf]
  7. Example of Pecha Kucha presentation [pdf]

Lab Sessions

This labs are initially thought as a continuation of PA-MIRI ones. Should you have not taken PA-MIRI, please contact your lab professor.

Name Date Docs
1.Infrastructure setup and test. Microprocessor selection. 10/9
2.Module definition and especification. Workplan.  1/10
3. Module implementation 15/10
  5/11 (NO LAB)
4. Module Review Week of 11-15/11 Interview
5. Insertion in pipelined CPU 12/11
19/11 (NO LAB)
 6.CPU review 17/12 Interview
Each group will chose one of the following modules to extend their baseline processor
   1) Associative cache
   2) Branch predictor
   3) Error detection and correction codes in the memory path
   4) High-performance functional units (i.e. adder, substracter, etc.)
   5) Accelerators (i.e crypthograhy, neuronal nets, etc.)

7 or 14/1
Due on 21/01

Lab session X is due on the date of lab sesion X+1. 

List of Papers for Presentation

Students will select one of the following papers for their presentations:

Alternatevely, students may choose a different paper as long as it is related to the contents of PD. Any paper published in one of the following conferences in recent years should be acceptable:

Bibliography and Useful Links